1. Field of the Invention
The present invention relates to a method for generating a layout, use of a transistor layout, and a semiconductor circuit.
2. Description of the Background Art
In the design (layout) for the production of semiconductor components, computer-aided design environments are used today, which provide basic elements, such as transistors, resistors, etc., in a component level as variable cells (generators). To achieve as many degrees of freedom as possible in the wiring of these elements, they are equipped only with terminals for the lowest metallization level. For this purpose, contacts are provided between the elements and the lowest metallization level. These contacts can be regarded as connecting elements of a contact level. U.S. Patent Application No. 2005/0224982 A1 discloses a via configurable architecture of a semiconductor circuit for application-specific analog circuitry. U.S. Patent Application No. 2002/0040986 A1 discloses a semiconductor circuit with a dummy structure. Unexamined German Patent Application No. DE 35 14 266 A1 discloses a component for generating integrated circuits. This component has a trace field with traces crossing in a lattice manner.
Furthermore, during the design and in the practical realization of semiconductor components, such as, for example, the input stage of an amplifier or a digital-to-analog converter (DAC), so-called matching requirements must be routinely fulfilled, which are to assure that the individual pathways of the produced semiconductor component behave similarly to one another electrically, i.e., in a signaling manner. Such matching requirements are realized by matching structures, which are also called pairing structures. In this regard, such assembled semiconductor components in practice are routinely generated in a field of identical (semiconductor) elements, which are arranged on a wafer distributed around a mutual center, to equalize possible gradients, which arise due to process tolerances along the surface. Advantageously, the individual elements are dimensioned relatively large. Gradients of this type are generally local differences between electrical parameters, such as a voltage, which may have many possible causes. Examples here are: inhomogeneities of process parameters (layer thicknesses, doping, etc.), mechanical stress, uneven heat distribution during operation, and the like.